The present invention relates to an information processing system, e.g., a programmable digital computer, as well as an information processing method and a computer-readable recording medium having recorded thereon a program for performing such method.
Information processing systems include not only general purpose computers which can be programmed to perform tasks of virtually unlimited variety, but also more specialized equipment which typically is employed to perform certain specialized tasks such as information storage and retrieval, media recording and reproduction, etc.
Information processing systems, both general purpose and special purpose systems, typically are enabled to perform specialized tasks by programs. Application programs include those which are adapted especially for a particular end use of an information processing system. Application programs tend to use the resources of an information processing system in ways that can vary greatly from one application program to another. Sometimes, an application program utilizes particular facilities of an information processing system that are infrequently used by other application programs. By way of example, particular facilities used by an application program can include the ability to execute certain instructions that address the needs of the particular application program.
Since particular facilities used by one application program may be infrequently used by other application programs, the facilities need not be included in or be available as part of every information processing system on which other application programs are executed. In some cases, a particular facility is only available when the information processing system is an upgraded version in relation to another less equipped version of the information processing system, e.g., a base model. Alternatively, the particular facility may only be present when the information processing system is specifically configured to incorporate such facility.
Since the facilities available on any given information processing system can vary, it is useful for programs which are executed thereon to be able to determine quickly which facilities of the information processing system are available. Programs can then be executed in a way that takes advantage of the available facilities.
In a prior art information processing system according to the z/Architecture Principles of Operation (Publication Number SA22-7832-04, available from IBM Corporation, Armonk, N.Y., which is incorporated herein by reference in its entirety), an instruction known as STORE FACILITY LIST (“STFL”) returns a result which indicates whether or not certain facilities are available and installed on the information processing system. The results are returned in form of a fixed length and fixed definition data record in which each bit thereof identifies whether or not a particular facility is installed. The STFL instruction is also limited in how it can be issued and how the result can be accessed.
One limitation is that STFL is a control instruction. The STFL instruction can only be issued by a program that is being executed in the “supervisor state”. Such program is referred to as a system-control program, or operating system. The STFL instruction cannot be executed by an application program, i.e., a program that is currently being executed in the “problem state,” as opposed to the supervisor state. If the STFL instruction is issued by an application program, a privileged-operation program exception condition is recognized, which prevents the instruction from being executed.
In an embodiment, a computer system includes a Program Status Word. The current program-status word (PSW) in the CPU contains information required for the execution of the currently active program. The PSW is 128 bits in length and includes the instruction address, condition code, and other control fields. In general, the PSW is used to control instruction sequencing and to hold and indicate much of the status of the CPU in relation to the program currently being executed. Additional control and status information is contained in control registers and permanently assigned storage locations.
The status of the CPU can be changed by loading a new PSW or part of a PSW. Control is switched during an interruption of the CPU by storing the current PSW, so as to preserve the status of the CPU, and then loading a new PSW.
The current program-status word (PSW) in the CPU contains information required for the execution of the currently active program. The PSW is 128 bits in length and includes the instruction address, condition code, and other control fields. In general, the PSW is used to control instruction sequencing and to hold and indicate much of the status of the CPU in relation to the program currently being executed. Additional control and status information is contained in control registers and permanently assigned storage locations. The status of the CPU can be changed by loading a new PSW or part of a PSW. Control is switched during an interruption of the CPU by storing the current PSW, so as to preserve the status of the CPU, and then loading a new PSW.
Problem State (P): When p bit of the PSW (bit 15) is one, the CPU is in the problem state. When bit 15 is zero, the CPU is in the supervisor state. In the supervisor state, all instructions are valid. In the problem state, only those instructions are valid that provide meaningful information to the problem program and that cannot affect system integrity; such instructions are called unprivileged instructions. The instructions that are never valid in the problem state are called privileged instructions. When a CPU in the problem state attempts to execute a privileged instruction, a privileged-operation exception is recognized. Another group of instructions, called semi-privileged instructions, are executed by a CPU in the problem state only if specific authority tests are met; otherwise, a privileged-operation exception or a special-operation exception is recognized.
Another limitation relates to the location at which the results returned by the STFL instruction are stored. In accordance with prior art z/Architecture, results returned by the STFL instruction are always mapped to the same real address of 200 (C8 hexadecimal) in memory. Using the z/OS operating system, this real address is mapped to a real page-frame address of zero in the address space of each application program. In this way, each application program on a system which uses the ZOS operating system can directly access the result returned by a STFL instruction issued by the operating system. However, when a different operating system is provided such as Linux, real address 200 is not mapped to a location within the address space of an application program. In that case, an application program cannot view the facilities information returned by the STFL instruction without the support of the operating system (for example, the operating system may provide a system call which will return this information to the application program).
Other limitations of the STFL instruction are the short, fixed length of 32 bits of the result it returns and the fixed definition given to each of the 32 bits included in the result. In certain cases, a particular application program needs to obtain information about the capabilities of the information processing system which does not fit within the traditional bit definitions of the result of the STFL instruction. The number of bits returned by executing the STFL instruction and the definition given to each bit can fall short of the information needed by a particular application program.